;
list p=pic16f84a		;me tin entoli list enhmerwnete o assembler oti to programma pou akolouthei afora ton mikroepejergasti 16F84A
include p16f84a.inc
__config _XT_OSC & _WDT_OFF & _PWRTE_ON & _CP_OFF
;
errorlevel -302 ;
;
#define 		BIT1	PORTA,0		; LEDs will be driven by B2 and B3
#define		BIT2	PORTA,1
#define 		BIT3	PORTA,2		; LEDs will be driven by B2 and B3
#define		BIT4	PORTA,3
;
#define		DEBUG1	PORTB,1
#define		DEBUG2	PORTB,6		; Auxiliary Debug Pins
#define		DEBUG3	PORTB,7
;
#define		SW1	PORTB,4
;
PORTB_DIR	equ	B'00000001'	; PORTB pins are Outputs except B0
PORTA_DIR	equ	B'00000000'	; All PORTA pins are inputs. Not Used
;
;
; EDW ORIZONTAI OI DIEYTHUNSEIS TIS RAM
;
TEMP		equ	H'0010'
COUNT		equ	H'0011'
COUNT1		equ	H'0012'
COUNT2		equ	H'0013'
;
;
;
	org 0000h  	;Reset
	goto Main
	org 0004h  	; Interrupt vector
	goto ISR
	return
;	org 0010h
;
;
;*********************************************************
Main:
;*********************************************************
;
;	arxikopoiisi twn portA kai portB
;
	bcf	STATUS,RP0	; BANK 0
	call	Init
;
;
Loop:
	bsf	DEBUG2		;kanei to pott6b iso me 1
	call	Delay
;
	bcf	BIT1		;kanei to pott2b iso me 0	
	bcf	BIT2		;kanei to pott3b iso me 0
	bcf	BIT3		;kanei to pott4b iso me 0
	bcf	BIT4		;kanei to pott5b iso me 0
;
	btfsc	SW1
	goto	Loop		;an sto port0B erthei to 1 tote tha ginei reset(dil tha xekinisei palli apo to 0000) 
;
	call	Delay
	bsf	BIT1		;kanei to pott2b iso me 1	
	bcf	BIT2		;kanei to pott3b iso me 0
	bcf	BIT3		;kanei to pott4b iso me 0
	bcf	BIT4		;kanei to pott5b iso me 0
;
	btfsc	SW1
	goto	Loop		;an sto port0B erthei to 1 tote tha ginei reset(dil tha xekinisei palli apo to 0000) 
;
	call	Delay
	bcf	BIT1		;kanei to pott2b iso me 0	
	bsf	BIT2		;kanei to pott3b iso me 1
	bcf	BIT3		;kanei to pott4b iso me 0
	bcf	BIT4		;kanei to pott5b iso me 0
;
	btfsc	SW1
	goto	Loop		;an sto port0B erthei to 1 tote tha ginei reset(dil tha xekinisei palli apo to 0000) 
;
	call	Delay
	bsf	BIT1		;kanei to pott2b iso me 1	
	bsf	BIT2		;kanei to pott3b iso me 1
	bcf	BIT3		;kanei to pott4b iso me 0
	bcf	BIT4		;kanei to pott5b iso me 0
;
	btfsc	SW1
	goto	Loop		;an sto port0B erthei to 1 tote tha ginei reset(dil tha xekinisei palli apo to 0000) 
;
	call	Delay
	bcf	BIT1		;kanei to pott2b iso me 0	
	bcf	BIT2		;kanei to pott3b iso me 0
	bsf	BIT3		;kanei to pott4b iso me 1
	bcf	BIT4		;kanei to pott5b iso me 0
;
	btfsc	SW1
	goto	Loop		;an sto port0B erthei to 1 tote tha ginei reset(dil tha xekinisei palli apo to 0000) 
;
	call	Delay
	bsf	BIT1		;kanei to pott2b iso me 1	
	bcf	BIT2		;kanei to pott3b iso me 0
	bsf	BIT3		;kanei to pott4b iso me 1
	bcf	BIT4		;kanei to pott5b iso me 0
;
	btfsc	SW1
	goto	Loop		;an sto port0B erthei to 1 tote tha ginei reset(dil tha xekinisei palli apo to 0000) 
;
	call	Delay
	bcf	BIT1		;kanei to pott2b iso me 0	
	bsf	BIT2		;kanei to pott3b iso me 1
	bsf	BIT3		;kanei to pott4b iso me 1
	bcf	BIT4		;kanei to pott5b iso me 0
;
	btfsc	SW1
	goto	Loop		;an sto port0B erthei to 1 tote tha ginei reset(dil tha xekinisei palli apo to 0000) 
;
	call	Delay
	bsf	BIT1		;kanei to pott2b iso me 1	
	bsf	BIT2		;kanei to pott3b iso me 1
	bsf	BIT3		;kanei to pott4b iso me 1
	bcf	BIT4		;kanei to pott5b iso me 0
;
	btfsc	SW1
	goto	Loop		;an sto port0B erthei to 1 tote tha ginei reset(dil tha xekinisei palli apo to 0000) 
;
	call	Delay
	bcf	BIT1		;kanei to pott2b iso me 0	
	bcf	BIT2		;kanei to pott3b iso me 0
	bcf	BIT3		;kanei to pott4b iso me 0
	bsf	BIT4		;kanei to pott5b iso me 1
;
	btfsc	SW1
	goto	Loop		;an sto port0B erthei to 1 tote tha ginei reset(dil tha xekinisei palli apo to 0000) 
;
	call	Delay
	bsf	BIT1		;kanei to pott2b iso me 1	
	bcf	BIT2		;kanei to pott3b iso me 0
	bcf	BIT3		;kanei to pott4b iso me 0
	bsf	BIT4		;kanei to pott5b iso me 1
;
	call	Delay
	goto	Loop
;
	bsf	DEBUG3
;
;
;
;
;
;
;***************************************************************
Init:
;***************************************************************
;
;	edw kathorizontai ta port an einai eisodoi oh exodoi
;	episis apotrepontai ta interrupts
;
	bcf	STATUS,RP0	; BANK 0
;
	bcf	INTCON,GIE	; apotreponte ta interrupts
;
	movlw	PORTA_DIR	;thetw to portA ws eisodos
	bsf	STATUS,RP0	; BANK 1
	movwf	TRISA
	movlw	PORTB_DIR	; 
	movwf	TRISB		;;thetw to portA ws eisodos
	bcf	STATUS,RP0	; BANK 0
	bsf	DEBUG1
	bcf	DEBUG2
	bcf	DEBUG3
	bcf	SW1
	return
;
;
;***************************************************************
ISR:
;***************************************************************
;
;
	retfie
;
;
;
;***************************************************************
Delay:
;***************************************************************
;
	movlw	D'230'		; 230x4.4ms=1012ms to D dhlvnei to dekadiko
	movwf	COUNT2		
Decrease:
	call	Delay2
	decfsz	COUNT2
	goto	Decrease
	return
;
;
;***************************************************************
Delay2:
;***************************************************************
;
	nop
	nop
	nop		; Each Instruction takes 1us with a 4MHz processor clock
	nop		; 18x1us+1x2us=20usec
	nop
	nop
	nop
	nop
	nop
	nop
	nop
	nop
	nop
	nop
	nop
	nop
	nop
	nop
	return
;
;
;
	end
