** SPICE file created for circuit mux_2to1
** Technology: scmos
**

** NODE: 0 = GND
** NODE: 1 = Vdd
** NODE: 2 = Error
RLUMP0 100 101 1152.0
RLUMP1 102 103 273.5
M0 1 101 103 1 pfet L=2.0U W=4.0U
RLUMP2 102 104 273.5
RLUMP3 100 105 1152.0
M1 104 105 0 0 nfet L=2.0U W=4.0U
RLUMP4 106 107 258.0
RLUMP5 102 108 273.5
RLUMP6 109 110 54.5
M2 107 108 110 1 pfet L=2.0U W=4.0U
RLUMP7 106 111 258.0
RLUMP8 100 112 1152.0
RLUMP9 109 113 54.5
M3 111 112 113 0 nfet L=2.0U W=4.0U
RLUMP10 106 114 258.0
RLUMP11 100 115 1152.0
RLUMP12 116 117 54.5
M4 114 115 117 1 pfet L=2.0U W=4.0U
RLUMP13 106 118 258.0
RLUMP14 102 119 273.5
RLUMP15 116 120 54.5
M5 118 119 120 0 nfet L=2.0U W=4.0U
C0 116 0 26F
** NODE: 116 = A1
C1 106 0 53F
** NODE: 106 = Z0
C2 109 0 28F
** NODE: 109 = A0
** NODE: 0 = GND!
C3 102 0 45F
** NODE: 102 = tg_1/A
C4 1 0 21F
** NODE: 1 = Vdd!
C5 100 0 50F
** NODE: 100 = M
** There are two input signals which take the values:
** 00 01 10 11 every 100NSEC
VCC 1 0 5
VIN1 109 0 PWL(0 0 150NSEC 0 200NSEC 5 350NSEC 5 )
VIN3 116 0 PWL(0 0 60NSEC 0 70NSEC 5 120NSEC 5 210NSEC 0 250NSEC 0 300NSEC 5 350NSEC 5)
VIN2 100 0 PWL(0 0 90NSEC 0 100NSEC 5 190NSEC 5 200NSEC 0 290NSEC 0 300NSEC 5 350NSEC 5)
.MODEL pfet PMOS
.MODEL nfet NMOS
.TRAN 1NSEC 350NSEC 0
.END