** SPICE file created for circuit b
** Technology: scmos
**

** NODE: 0 = GND
** NODE: 1 = Vdd
** NODE: 2 = Error
RLUMP0 100 101 410.5
RLUMP1 102 103 68.5
M0 1 101 103 1 pfet L=2.0U W=4.0U
RLUMP2 102 104 68.5
RLUMP3 100 105 410.5
M1 104 105 0 0 nfet L=2.0U W=4.0U
RLUMP4 106 107 363.0
RLUMP5 100 108 410.5
M2 1 107 108 1 pfet L=2.0U W=4.0U
RLUMP6 100 109 410.5
RLUMP7 106 110 363.0
M3 109 110 0 0 nfet L=2.0U W=4.0U
C0 106 0 13F
** NODE: 106 = I
** NODE: 0 = GND!
C1 102 0 34F
** NODE: 102 = O
C2 1 0 33F
** NODE: 1 = Vdd!
C3 100 0 49F
** NODE: 100 = inv1_1/A
** There are two input signals which take the values:
** 00 01 10 11 every 100NSEC
VCC 1 0 5
VIN1 106 0 PWL(0 0 50NSEC 0 100NSEC 5 150NSEC 5 )
.MODEL pfet PMOS
.MODEL nfet NMOS
.TRAN 1NSEC 150NSEC 0
.END